The field of the invention is in the art of fabrication of single crystal semiconductor elements.
In the state of the art technology prior to this invention very high minority carrier lifetime (milliseconds) in silicon has been available but the resistivity of this material is far too high (greater than 5000 ohm-centimeters) for general use in the fabrication of semiconductor elements such as silicon solar cells. On the other hand, the prior art technology has provided lower more useful resistivities as is needed for silicon solar cells (0.1 ohm centimeter to 100 ohm centimeters), but the minority carrier lifetimes are typically 100 to 1000, or more, times lower than is desired and as is present in the very high resistivity material. The minority carrier lifetime problem for the 0.1 ohm centimeter to 100 ohm-centimeter resistivity range is not directly the result of the inherent resistivity of the material itself but is a result of how the silicon is processed into single crystal form and how it is doped with an electrical dopant to achieve the desired resistivity.
The prior problem of low minority carrier lifetime in low to moderate resistivity single crystal silicon is brought on directly by the presence of undesirable impurities (e.g., iron, tantalum, oxygen, carbon, copper, etc.) in the material. These unwanted impurities form "trapping" centers which trap the minority charge carriers and remove them from the energy conversion processes occurring in operational solar cells. Direct removal of these inpurities in the low to moderate resistivity silicon significantly improves the conversion efficiency of solar cells. Typical examples of the prior art may be found in U.S. Pat. No. 3,366,462 to patentees Kersting et al, U.S. Pat. No. 3,925,105 and 3,933,528 to patentee Sloan.